TSMC A14 Reaches Nearly 90% Yield and Performance, Outpacing N2 at Similar Stage

Q: With TSMC's A14 lacking backside power, will major AI chipmakers skip it for the more advanced A16, risking a demand gap?

Probably not. A14 is unlikely to face a major demand gap even without backside power, because TSMC appears to be segmenting its roadmap rather than asking all customers to choose between A14 and A16. The key point is that A16 and A14 are aimed at different parts of the market. A16, which adds Super Power Rail backside power delivery, is better suited to the most power-hungry AI and HPC chips, where current delivery, IR drop and routing congestion are critical limits. That is why reports already point to interest from advanced AI customers such as Nvidia for future designs on A16. A14, however, is not showing signs of weak demand. TSMC says customer interest is strong across smartphones, AI and HPC, and tape-outs are ahead of schedule. Its development is also maturing faster than N2 did, with nearly 90% device performance and SRAM yield on test silicon. That matters because many AI chips do not need the absolute most aggressive power-delivery scheme if they can get enough gains from better transistor performance, density and packaging. Timing also reduces the risk. A16 is due earlier, around 2026-2027 production, while A14 is targeted for the second half of 2028. So this is less a case of customers “skipping” an available node and more TSMC offering parallel options: A16 for top-end AI/HPC, A14 for broader client and some compute designs. The bigger variable is not a demand hole at A14, but whether advanced packaging, design readiness and fab capacity keep pace with AI demand.

3 articles · Updated · Tom's Hardware · Jul 17

TSMC said its 1.4nm-class A14 process now delivers close to 90% device performance and nearly 90% yield on a 256Mb SRAM test chip, about 2.5 years before planned mass production in the second half of 2028.
Those figures improved from more than 85% target transistor performance and over 80% SRAM yield disclosed in April, marking roughly a 5-point gain in performance and nearly 10 points in SRAM yield in three months.
TSMC said A14 is progressing faster than N2 did at the same stage, likely because A14 uses second-generation gate-all-around nanosheet transistors and benefits from manufacturing lessons learned during N2 development.
Customer engagement is already strong across smartphones and AI/HPC, with new A14 tape-outs running ahead of schedule, raising the possibility of earlier high-volume manufacturing if chip designs are ready.
Compared with N2, TSMC expects A14 to deliver 10% to 15% higher performance at the same power, or 25% to 30% lower power at the same speed, plus about 20% to 23% higher transistor density.

Sources

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Tom's Hardware2d ago

TSMC's A14 Process Achieves Nearly 90% Performance and SRAM Yield, Outpacing N2 Development

MSN2d ago

TSMC confirms significant yield and performance improvements in A14 update

windowsforum.com2d ago

TSMC A14 Nears 90% Yield, Targets Volume Production in H2 2028 | Windows Forum

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TSMC A14 (1.4nm) Process: Ahead of Schedule, Redefining Performance and Density for Next-Gen AI

Overview

The semiconductor industry is pushing for smaller, faster, and more efficient chips, with each new fabrication node marking a major engineering achievement. TSMC’s upcoming A14 (1.4nm-class) process, anticipated by mid-2026, builds on the rapid progress and breakthroughs of its N2 technology, which began volume production in late 2025. N2 introduced advanced nanosheet transistor technology, a key step beyond traditional FinFET designs, enabling significant performance gains. These innovations set the stage for A14’s accelerated development, promising even greater speed, power efficiency, and logic density, and reinforcing TSMC’s leadership in advanced chip manufacturing.

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