Apple A20 Pro Adds 96-Bit LPDDR5X Memory Bus for AI Workloads
Updated
Updated · Wccftech · Jul 8
Apple A20 Pro Adds 96-Bit LPDDR5X Memory Bus for AI Workloads
2 articles · Updated · Wccftech · Jul 8
Summary
Reptalica schematics indicate Apple’s A20 Pro will use six-channel LPDDR5X memory on a 96-bit bus, a shift aimed at boosting on-device AI performance.
That redesign targets a key bottleneck: memory-bound AI models. The wider bus should raise bandwidth and keep the chip from stalling while waiting for data.
Apple is also moving from its older 4-channel, 64-bit memory setup and pairing the A20 Pro with WMCM packaging instead of inFO-PoP to handle the larger memory footprint.
Separating DRAM from the 2nm A20 Pro die should improve heat dissipation and sustained performance, even without adopting the newer LPDDR6 standard.