MIT said its FUTUR-IC program has developed two new optical couplers that could help future chips move data at more than 1 petabit per second with lower energy use.
The devices target a key bottleneck in co-packaged optics: linking photonic chips that carry light with electronic processors that handle computation, a step that has remained costly and technically difficult.
The new GRIN and evanescent couplers are designed for different trade-offs—broader wavelength compatibility in one case, easier fabrication and denser packing in the other—and join a third earlier design from Professor Juejun Hu's team.
MIT said the couplers act as optical versions of solder bumps and could be made with existing semiconductor equipment, potentially easing large-scale adoption in AI-driven data centers and cloud infrastructure.
Beyond chip hardware, FUTUR-IC also introduced Earthster to model semiconductor manufacturing emissions and is building training programs around resource-efficient chip production.
Can MIT's new optical chips avert the looming AI hardware crisis caused by critical material shortages?
As tech giants race toward optical computing, could MIT’s breakthrough upend the entire industry roadmap?
MIT Unveils Optical Solder Bumps: Paving the Way for Petabit-Per-Second, Energy-Efficient AI Data Centers
Overview
MIT has announced a major breakthrough in data transfer technology by unveiling two new optical couplers, the evanescent and graded index (GRIN) designs, developed under its FUTUR-IC research program. These couplers address the long-standing challenge of efficiently connecting electronic and photonic chips, which has been difficult and expensive due to immature supply chains and integration bottlenecks. By enabling seamless integration within a single package, MIT’s innovation paves the way for faster, more energy-efficient data transfer, helping to overcome barriers that have limited the adoption of next-generation optical computing and supporting the growing demands of AI and data centers.