SMIC Ships 7nm N+3 in Huawei Kirin 9030 With 32.5nm Metal Pitch
Updated
Updated · newsletter.semianalysis.com · Jun 14
SMIC Ships 7nm N+3 in Huawei Kirin 9030 With 32.5nm Metal Pitch
1 articles · Updated · newsletter.semianalysis.com · Jun 14
Summary
SemiAnalysis’ teardown found SMIC’s third-generation 7nm N+3 process in Huawei’s Kirin 9030, with a 32.5nm minimum metal pitch and logic density of 113.4 MTr/mm².
That density is roughly comparable to TSMC N6 and tighter than the 36nm M0 pitch used in Intel’s shipped Panther Lake 18A chips, but it comes from aggressive DUV multi-patterning and DTCO rather than EUV.
Huawei used the denser node to add a fourth middle CPU core, more GPU and NPU resources, and larger caches in about the same ~140 mm² die area, while the chip still performs around older Android flagships.
Efficiency remains the bigger weakness: the Kirin 9030 trails current Apple, Qualcomm, MediaTek and Samsung SoCs, showing that matching density does not close the gap in power, performance and process maturity.
The teardown suggests export controls have redirected rather than halted China’s chip progress, pushing SMIC and Huawei toward costlier DUV scaling, domestic EDA, and future gains through advanced packaging and 3D stacking.
Can Huawei's 3D 'LogicFolding' leapfrog Moore's Law, making US chipmaking sanctions obsolete?
Is China's costly chip strategy a sustainable path to leadership or an inefficient project destined to lag?
With its new AI chips, is Huawei on the verge of ending Nvidia’s dominance inside of China?
SMIC’s N+3 “5nm-Class” Breakthrough: How China Achieved Near-5nm Chip Density Without EUV and What It Means for the Global Semiconductor Race
Overview
SMIC's breakthrough with its N+3 process marks a pivotal moment for China's semiconductor industry, signaling a new era for domestic chipmaking capabilities. This advanced 5nm-class technology, demonstrated in the Huawei Kirin 9030 Pro SoC, represents a significant leap from SMIC's previous 7nm-class process. Despite strict US export controls limiting access to EUV lithography, SMIC achieved impressive chip density using only DUV lithography. This achievement highlights both the ingenuity of Chinese engineers and China's progress toward technological self-reliance, setting the stage for further advancements in the nation's semiconductor ecosystem.